For the digital generation and modulation of the carrier in modems, the sampling frequency f.sub.A in relation to the symbol frequency f.sub.s can be implemented in two ways. First of all, a fixed, integral ratio can be selected between the sampling frequency and the symbol frequency, so that the sampling is carried out in synchronous form. In addition, the sampling frequency must satisfy the sampling theorem, i.e. it must be greater than double as large (as a rule four times as large) as the symbol frequency. The synchronous sampling demands a is clock-pulse extraction, which extracts the sampling clock pulse from the symbol clock pulse by frequency division.
In the case of asynchronous sampling, the sampling frequency is predetermined independently of the symbol frequency. In general, the asynchronous sampling can operate with a free-running sampling clock pulse which is independent of the symbol clock pulse. In a comparison of the asynchronous with the synchronous sampling, it is significant, inter alia, that in the case of the asynchronous sampling, in spite of a variable symbol rate, a requisite anti-aliasing filter, because of the fixed sampling frequency, does not have to be designed to be variable. The asynchronous sampling requires a variable interpolation on the transmitting side and a variable decimation on the receiving side, respectively. A method for digital modulation and a digital modulator having asynchronous sampling, as well as variable interpolation and variable decimation, respectively, are described, for example, in the German Patent No. 39 19 530, and in the European Patent Application No. 0 477 131.
In such digital modems which, in addition to the actual modulator and demodulator, also contain various digital signal-processing circuits such as coders and decoders, various clock signals are needed which are adapted to the various bit rates of the signals to be transmitted between the individual circuits. In this context, the clock frequencies are only partially in a fixed, rational ratio, e.g. 48/73. To generate clock signals in such a frequency ratio, in known modems, frequency dividers and phase-comparison circuits are used which, for the most part, are realized using analog circuit technology.
The object of the present invention is to provide a method and arrangements for extracting a plurality of clock signals from a supplied clock signal, which can be implemented exclusively in digital circuit technology. At the same time, the intention is to ensure to the greatest extent possible a flexibility with regard to the symbol rate and the data rate.